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  p1145-3s series full size (14 pin dip) metal clock oscillator cmos with enable/ disable lower ringing noise option available to reduce emi available in thru-hole or surface mount configuration 650 khz ? 69.999 mhz standard specifications overall frequency stability p1145-3s: 50 ppm, p1144-3s: 25 ppm, p1120-3s: 20 ppm over operating temp. range operating temperature range 0 to +70 c is standard, but can be extended to - 40 to +85 c for certain frequencies supply voltage (vcc) 5.0 volts and 3.3 volts available symmetry (duty cycle) 40/60 to 60/40% is standard, but 45/55% at 50% of vcc is als o available (see waveform 1) output load enable/disable option (e/d) output enabled when pin #1 is open or at logic ? 1 ? ; output disabled when pin #1 is at logic ? 0 ? . supply current rise and fall time frequency range (mhz) typical maximum typical maximum 0.650 ? 10.000 6.5 10.0 3.0 4.0 10.001 ? 25.999 15.0 20.0 2.5 3.5 26.000 ? 34.999 18.0 25.0 2.5 3.5 35.000 ? 50.000 25.0 30.0 2.5 3.5 part numbering guide model frequency stability 45 = 50 ppm 44 = 25 ppm frequency in mhz special specifications (choose all that apply) p11 45 - 3s v -- 60.0m - 30 - smd consult factory for available frequencies and specs. not all options available for all frequencies. a special part numbe r may be assigned. blank: std specs (5.0v 10% , 0 to +70 c, 40/60% sym) e: extended operating temperature range (- 40 to +85 c) n: lower ringing noise s: 45/55% symmetry at 50% of vcc v: supply voltage of 3.3 volts 19013 36th ave. west suite h lynnwood, wa 98036, usa 10% 50.001 ? 69.999 32.0 35.0 2.5 3.5 frequency stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration a nd load surface mount option mechanical: not to scale inches (mm) surface mount (425) 776 - 1880, fax: (425) 776 - 2760, ple - sales@pletronics.com, www.pletronics.com 17 jan 2002 solder pad layout may use any combination of pins 1, 7, 8 & 14 shown. recommended pad size is .12 (3.1) x .07 (1.8) typical. pl tronics, inc. .807 (20.5) max pletronics .500 (12.7) max .247 (6.28) max .200 (5.08) max .600 (15.24) .300 (7.62) 1 7 14 8 e/d vcc out gnd .031 (0.8) .560 (14.23) max .300 (7.62) .200 (5.08) typ 1 1 1 14 14 14 8 8 8 7 7 7 .250 (6.35) max .020 (.51) .820 (20.84) max .767 (19.49) .600 (15.24) standard load is 15pf maximum, see test circuit 3 (consult f actory for heavier loads) icc (ma) w/ 15pf load tr & tf (ns) w/ 15pf load packaging tube or on pads, smd: bulk due to part size and factory abilities, part marking may var y from lot to lot and may contain our part number or an inte rnal code. non-std output load: blank = 15 pf max, 30 = 30 pf max, 50 = 50 pf max logic levels logic ? 1 ? 90% of vcc min; logic ? 0 ? 10% of vcc max 20 = 20 ppm ringing noise depends on frequency and output load. see emi application no te


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